1. Technical Field
The present invention relates to a method and a device for entering a test mode in a Floppy Disk Drive (FDD). More particularly, the present invention relates to a method for entering a test mode using an Integrated Circuit (IC) within an FDD apparatus in which the IC enters the test mode upon input of a test-mode command and to an FDD apparatus incorporating the method.
2. Related Art
For the purpose of inspection, a test mode is provided within an IC incorporated in a FDD. Entry into the test mode occurs by entering a test command in a dedicated input terminal or applying a digital signal to an input terminal of the FDD apparatus. In carrying out the inspection, the FDD apparatus should not enter the test mode when operating in a normal mode. In some ICs, however, noise signals can cause the FDD apparatus to enter the test mode unexpectedly.
One aspect of the present invention provides a method and a device for entering a test mode in an Integrated Circuit (IC) used in a Floppy Disk Drive (FDD) apparatus. The IC prevents the FDD from entering a test mode when operating in a normal mode even in the event of receiving an enabling command, such as an enter-test-mode command or a signal coinciding with such a command. In another aspect, the invention provides an FDD apparatus incorporating the method and the device. According to this aspect, the IC enters the test mode when the IC receives the enabling command within a predetermined period of time after the FDD apparatus is powered up at a steady state voltage. The IC enters the test mode only when an enabling command is received during a pre-operation period that preferably occurs when the FDD apparatus is powered up and the FDD apparatus has not begun normal operation. Therefore, the IC prevents the FDD apparatus from unexpectedly entering the test mode while operating in a normal mode even if the enabling command or the signal coinciding therewith is received.
Preferably, the FDD IC enters a normal mode when the predetermined time period lapses, unless the enabling command is received within the predetermined time period and the disk drive is powered up to a steady state. If the test mode command is not received within this predetermined time period, the FDD automatically enters a normal mode ensuring the stable operation of the FDD apparatus. Preferably, the predetermined time period begins after a power supply voltage and a clock frequency have stabilized and the enabling command is stably received. Thus, the IC enters the test mode stably and securely.
According to another aspect, the device for entering a test mode in an FDD apparatus comprises a selecting circuit, unitary with, integrated within, or interfaced to the FDD IC. Preferably, the selecting circuit initiates the test mode when an enabling command is received within the predetermined period and the FDD is powered up to the steady state. Thus, the IC prevents the FDD from accidentally entering the test mode.
According to yet another aspect, an FDD includes an FDD IC. The FDD IC enters a test mode when an enabling command is received within a predetermined time period and the FDD is powered up. A spindle motor driven by a motor driver is controlled by the FDD IC when the FDD is operating in a normal mode. A head that reads data from and writes data to a media such as a floppy disk is driven by the spindle motor. Preferably, a stepping motor actuates the head. The IC is prevented from entering the test mode when operating in a normal mode.